## Powerview Command-Line Syntax

Table 1 shows the command-line syntax for using Powerview functions.

#### Table 1. Powerview Command-Line Syntax

Action | Command
--- | ---
Start VHDL Analyzer software | `vhdl -v` <project name>
Start ViewSynthesis software | `vhdldes`
Load Altera® technology library | `vhdldes> technology altera`
Compile a VHDL design | `vhdldes> vhdl` <project name>
Synthesize a design | `vhdldes> synthesize`
Generate wirelist file | `vhdldes> wir`
Create a schematic representation | `vhdldes> viewgen`
Generate a synthesis report file | `vhdldes> report`
Start the graphical user interface for ViewSynthesis | `vhdldes> vdesgui`
Start the VHDL-to-symbol utility | `vhdl2sym` <project name>
Start vsm | `vsm` <project name>
Start ViewSim simulator | `viewsim` <project name> -<project name>`.cmd`
Start edifneto | `edifneto -f` <project name>-`l` (`std` or `altera`) <project name>`.edf`
Start Vantage VHDL Analyzer software | `analyze -src` <design file>
Start MOTIVE for Powerview software | `mfp`

Last Updated: August 28, 2000 for MAX+PLUS II version 10.0 |
| Home | List by Vendor | List by Tool | List by Function | Viewlogic Topics | Documentation Conventions Copyright © 2000 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA. All rights reserved. By accessing any information on this CD-ROM, you agree to be bound by the terms of Altera's Legal Notice.