## Specifying the MAX+PLUS II Logic Synthesis Style with FPGA Express Software

You can specify the MAX+PLUS® II global project logic synthesis style for FLEX® devices from within the FPGA Express software. To specify the global project logic synthesis style, follow these steps:

1. Choose Options (Synthesis menu) to display the Options dialog box.
2. Choose the Behavior tab.
3. Turn the Insert LCELL Buffers, Style WYSIWYG (Altera FLEX Only) option on or off:

   - Turning this option on is the equivalent of specifying the WYSIWYG (What You See Is What You Get) logic synthesis style in the MAX+PLUS II software. The WYSIWYG style directs the Compiler's Logic Synthesizer module to change the logic in your project as little as possible during compilation. The WYSIWYG style avoids removing or inserting additional logic, and turns off many logic options that might help the project to fit. In addition, if this option is turned on, the FPGA Express software inserts `LCELL` buffers for look-up table (LUT) outputs so that the MAX+PLUS II software will not alter the logic cell implementations. This option is recommended when a design's area optimization has priority over its speed.

   - Turning this option off is the equivalent of specifying the Fast logic synthesis style in the MAX+PLUS II software. The Fast style directs the Compiler's Logic Synthesizer module to optimize your project for maximum speed, rather than for minimum silicon usage. In addition, if this option is turned off, the FPGA Express software does not insert `LCELL` buffers, thereby allowing the MAX+PLUS II software to optimize the LUT logic to improve performance.
4. Choose OK.

| Go to the following topics, which are available on the web, for additional information:

- FLEX Devices
- MAX® Devices
- Classic Device Family

August 28, 2000 for MAX+PLUS II version 10.0
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