Pinhole Elimination

Pinhole Elimination is a read-write DFM action intended to remove small copper residues (islands) and cover small pinholes (tiny copperless gaps surrounded on all sides by copper) in the layer. Such islands may be easily disconnected from the laminate, causing shorts in the circuitry. Pinholes, on the other hand, may cause electrical breaks, decreased connectivity, or undesirable electrical effects.

Pinhole Elimination locates such undesirable features by first contourizing the layer features and then looking for islands, and holes in islands, which are smaller than a predefined parameter. If there is enough surrounding space, islands will be covered by negative features and holes will be covered by positive features. In cases where the surrounding space is too limited to insert a patch, the hole or island will be listed in the Uncovered category.

All features listed in the Pinhole Elimination category are tagged with the .patch attribute.

Another problem that Pinhole Elimination helps solve: some surface-fill algorithms produce sets of parallel lines, which are placed parallel to each other. As result of rounding errors in different software and hardware components, such lines sometimes create long slivers or holes.  Pinhole Elimination enlarges all such lines slightly (by 0.001 mil).

Pinhole Elimination operates on any layer but is mainly designed for power and ground, mixed, and signal layers.

*        Layers with more than 320,000 nets cannot be processed in global mode

 

Screen Parameters

Fill With

Enables you to define how to fill pinholes: Lines and/or Surfaces.

Special Reports

Reports the total features detected for each category in each layer.

Result Attributes

No result attributes are produced.